Job Description

In a fast-paced leading-edge design environment with endless possibilities of innovation and learning , you will be responsible for ensuring flawless execution in specific areas of SoC level Physical Design Implementation such as Floorplanning, Power Delivery Network Planning and implementation, SoC level Physical Integration , Physical Verification Sign-off and Tapeout, This is a great opportunity to join a team of talented individuals working on state-of-the art complex SoC Designs as part of Intel Foundry Design Services and Reference Design Development teams.

The key skillsets need to include expertise in one or more areas of: - Ensuring robust design of Power Delivery Network, Decoupling Cap and Custom Route planning for complex SoC Design. - Interface with Packaging Experts to ensure planning for Bumps that meet Packaging and Manufacturing Design Rules. - Implements 3D / 2.5D IC Interface and interconnects ensuring tight correlation between Top and Bottom Die components placement along with their electrical and thermal requirements. - Generates SoC level GDS and Netlist views for consumption of downstream tools. - Physical Verification, ESD Protection planning and Verification at SoC level. - Floor planning with industry standard tools for block and SoC level complexities. - Provides timely fixes at SoC and Block level to meet Design Rules and EM-IR requirements. - Interface with multiple adjacent domain leads such as Architects, EM-IR leads, Floorplan leads, Physical Design, Verification and Packaging leads to internalize and implement changes at SoC level.

The ideal candidate should exhibit behavioral traits that indicate: - Self-motivator with strong problem-solving skills - Strong leadership skills with ability to mentor junior engineers. - Excellent interpersonal skills, including written and verbal communication. - Ability to work as part of a team and collaborate in a high-paced atmosphere. - Ability to provide technical direction to the team and influence design flows and methodology.

Qualifications

Mtech/Btech Engineering Degree in field of Electrical, Electronics, Computer Science with 8 - 10 years of relevant experience in design and methodology development of complex multi-million gate and SoC designs, with demonstrate capability in areas of : Floor-planning, Power-planning, Physical Design and Verification along with Tapeout. 2.5/3D IC Physical Design integration and Verification. Expertise in industry standard EDA tools for Floorplanning, Pand R, Layout Verification is required. Knowledge of Sign-off flows such as EM/IR , Layout Verification and ESD sign-off is an added advantage. Proficiency in scripting language, viz., Perl and Tcl would be required.

Inside this Business Group

Intel Foundry is dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. As stewards of Moore's Law, we innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of the Foundry Services business unit within Intel Foundry, a customer-oriented service organization that is dedicated to the success of its customers with full P&L responsibilities. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

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Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.